The block diagram of the FFT subsystem is shown in Fig. 25.4. The basic unit of the FFT subsystem takes two data streams (either A,B or C,D in Fig. 25.3) from the Delay-DPC. In the first stage, a weighting function can be applied to the 4 bit time series. The weighting function is software selectable, and can be chosen to be one of the standward ``window functions'' discussed in Chapter 8. This is followed by a number controlled oscillator (NCO), which does the fringe stopping (see Chapter 9). The two fringe stopped time series are passed through two sets of FFT engines, realized using VLBA ASICs, to perform Fourier transforms. Phase gradients are then applied to the spectrum of the signal to correct for delays smaller than the sampling interval (FSTC).
Each FFT engine can perform a Fourier transforms of maximal
length 512 points. This length is software selectable to be 256, 128
or 16 points; it is even possible to bypass the FFT operation altogether.
A 512 point FFT gives 256 channels, however in the next stage of
the correlator (MAC) there are only enough multipliers for 128
channels per sideband per polarization. In the standard mode of
operation, two adjacent FFT channels are hence averaged together in
the MAC. A single MAC also acquires data from two FFT engines in a
time multiplexed fashion. The data is multiplexed as shown in
Fig. 25.4, where 
and 
are the spectral
channels from the two FFT engines.
